What is the difference between Ivy bridge and Sandy Bridge processor architecture?Hello everyone, if someone knows, explain what is the difference between Ivy bridge and Sandy Bridge?
SpoilerMigration to 22nm process technology (improved performance and reduced power consumption).
16 graphic execution units (EU, Execution Units).
Increase in IPC (number of instructions executed per clock), addition of the instruction set architecture (Instruction Set Architecture) with four instructions for accelerated access to the base registers FS (Front Side) and GS (Graphics Side), acceleration of REP MOVSB/STOSB string instructions, acceleration of number conversion with floating point from 16-bit format to 32-bit format.
New ring bus Ring Interconnect (more productive than QPI) that combines processor cores, graphics core and system agent (System Agent) through a common last-level cache (LLC, L3).
Backwards compatible with second generation Sandy Bridge processor socket.
New 2- or 4-channel DDR3 controller supporting up to DDR3-2800 MT/s and DDR3L (low voltage) memory.
Integrated PCI Express 3.0 controller (except for i3 processors).
Built-in USB 3.0 support (4 ports) in 7 series chipsets.
Built-in Thunderbolt support.
Panther Point chipset with new FDI interface for simultaneous connection of up to three displays.
Advanced energy saving technologies (configurable TDP, low power mode).
Added high-speed, high-quality hardware random number generator supporting ANSI X9.82, NIST SP 800-90, and NIST FIPS 140-2/3 Level 2 certifications.
A new RDRAND instruction has been added to work with the random number generator, returning a random number in a 16-, 32-, or 64-bit register.
A new supervisor mode protection mode (SMEP, Supervisor Mode Execution Prevention) has been added to prevent code execution from custom pages.
Integrated video core improvements.wiki